The present invention relates to a performance evaluation system and a performance evaluation method which can accurately estimate an event sector error rate after error correction in a performance evaluation for a high performance channel that contains a parity code, an MTR (Maximum Transition Recording) code, and so on, and an information storage apparatus using same.
FIG. 10 shows a graph which evaluates the dependency of an event error rate on the number of errors within one sector (512 bytes) in data sectors using a read/write channel code which has been developed for recent harddisk drives. Three types of codes (codes 1-3) are used in the evaluation. While any of the codes exhibits a reduced event error rate as the number of errors increases, the degree of reduction differs from one code to another. Also, although not shown, the three codes differ in the event error frequency (generally corresponding to BER (byte error rate), later described) of 1-2 bytes, which exhibits the highest error frequency.
The BER is evaluated by multiplying the event error rate by the number of errors at each number of errors and summing the resulting products, i.e., by integrating a curve representing the error number dependency as shown in FIG. 10. As the sum is smaller, the BER is evaluated as better. For calculating this value for each code, (3Exe2x88x9203xc3x971+4Exe2x88x9203xc3x972)/512=3Exe2x88x9205 for the code 1 (the division by 512 is performed to find the number of errors in one sector (512 bytes)). Similarly, (3Exe2x88x9202xc3x971+4Exe2x88x9202xc3x972)/512=2Exe2x88x9204 for the code 2, and (3Exe2x88x9202xc3x971+1Exe2x88x9202xc3x972)/512=1Exe2x88x9204 for the code 3. The results demonstrate the code 1 as the best code in terms of BER. However, the code 3 is the best in evaluation of EER (Event Error Rate) when the number of errors per sector exceeds 3 bytes.
Since actual harddisk drives comprise respective error correcting circuits (ECC) behind a R/W channel, the criteria of selecting the best code may vary depending on the correction capabilities of particular ECCs. Generally, it is estimated that the code 1 is more effective when an employed ECC has a poor correction capability, while the code 3 is effective when an employed ECC has a high correction capability. More specifically, however, it is thought that since errors can appear in a number of different manners in one sector, even the same number of errors may not be corrected occasionally by a particular EEC depending on how the errors appear in a sector.
With the ECC, NRZ read data is interleaved to limit the data length per interleave within 255 bytes. The number of interleaves for the ECC currently applied to harddisk drives is generally three or four, so that the number of hardware correctable bytes per interleave is approximately four or five. If the number of hardware correctable bytes per interleave is exceeded in any of interleaves, a retry (re-read operation) occurs due to the inability of hardware correction. A retry results in an inevitable loss of time required to rotate a magnetic disk once and accordingly lower performance of the drive.
FIGS. 11A to 11C show examples of error generation patterns when seven bytes of errors occur in a three-interleave scheme. When errors are successive in NRZ read data as shown in FIG. 11A, all the errors will not concentrate in a single interleave. However, when errors occur at a plurality of separate positions as shown in FIGS. 11B and 11C, the errors are susceptible to concentration in a data interleave 1 (DI-1). When errors occur highly frequently as shown in FIG. 11C, an ECC is required to have the error correction capability of 7 bytes per interleave.
It will be appreciated from the foregoing discussion that the conventional evaluation based on BER or the number of errors in one sector cannot provide the most effective code after an ECC or a detailed configuration of the ECC (a required number of bytes corrected thereby, the number of interleaves, and so on). For this reason, the conventional performance evaluation including the configuration of the ECC cannot but relying on a system level evaluation. However, the coding technology has been remarkably advanced in recent years together with the development of LSI miniaturizing processes, and therefore an erroneous determination is likely to be made unless rapid and appropriate evaluation is made.
A recently developed GCR (Group Coded Recording)+parity code or the like, described in xe2x80x9cA New Target Response with Parity Coding for High Density Magnetic Recording Channels,xe2x80x9d IEEE TRANSACTION ON MAGNETICS, vol. 34, No. 4, July 1998 does improve the BER because of the correction capability possessed by the code itself, but has a concern for the influence on the ECC due to possible erroneous corrections. On the other hand, an MTR (Maximum Transition Recording) code or the like described in xe2x80x9cMaximum Transition Run Codes for Data Storage Systems,xe2x80x9d IEEE TRANSACTION ON MAGNETICS, Vol. 32, No. 5, September 1996, defines the number of maximum successive magnetization. The MTR code, although providing little improvement on BER, is characterized by its immunity to the influence of disk noise and so on and less susceptibility to long errors because the number of successive magnetization is defined. Other than the foregoing, the development of new codes has been rapidly advanced, such as applications of a turbo code, which has been brought into practice in the field of communications, and so on. Thus, rapid evaluation on the performance of systems with such new codes, including the effect of the ECC, has become extremely important for the development of systems.
To achieve the above object, the present invention provides a performance evaluation method for use in data processing after decoding of data, comprising the steps of setting the number of interleaves (Ni), and a threshold (Th) for the number of errors per interleave, interleaving detected errors, counting the interleaved errors in a data sector for each interleave, and counting the number of times the counted number of interleaved errors exceeds the threshold in each data sector.
The present invention also provides a performance evaluation system which comprises error detecting means for comparing user data stored in a memory with read data outputted from a read/write channel to detect errors, error interleaving means for interleaving errors detected by the error detecting means, first counting means for counting the errors, and second counting means for counting the number of times a counted value on the first counting means exceeds a set threshold.
The present invention further provides an information storage apparatus which has an information storage medium, a head for reading/writing information from/on the information storage medium, an actuator for moving the head over the information storage medium, amplifying means for amplifying a read waveform read by the head, and signal processing means for decoding from the read waveform. The information storage apparatus also comprises error detecting means for comparing read data outputted from the signal processing unit with user data stored in a memory to detect errors, error interleaving means for interleaving errors detected by the error detecting means, first counting means for counting errors interleaved by the error interleaving means, setting means for setting a threshold for the number of errors per interleave, and second counting means for counting the number of times a counted value on the first counting means exceeds the threshold.